SN74HC368PWR Datasheet

Buffers & Line Drivers


These hex inverting buffers( SN74HC368PWR ) and line drivers are designed specifically to improve both theperformance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The SN74HC368PWR devices are organized as dual 4-line and 2-line buffers/drivers with active-low output-enable (1OE and 2OE) inputs. When OE is low, the device passes inverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state. SN74HC368PWR Features • Wide Operating Voltage Range of 2 V to 6 V• High-Current 3-State Outputs Drive Bus Lines, Buffer Memory Address Registers, or Drive Up To 15 LSTTL Loads• Inverting Outputs• Low Power Consumption, 80-µA Max ICC• Typical tpd = 10 ns• ±6-mA Output Drive at 5 V• Low Input Current of 1 µA Max


[{"Name":"Propagation Delay Time:","Value":"120 ns at 2 V"},{"Name":"Number of Channels per Chip:","Value":"5"},{"Name":"Minimum Operating Temperature:","Value":"- 40 C"},{"Name":"Low Level Output Current:","Value":"7.8 mA"},{"Name":" High Level Output Current:","Value":"- 7.8 mA"},{"Name":"Maximum Operating Temperature:","Value":"+ 85 C"},{"Name":"Supply Voltage - Min:","Value":"2 V"},{"Name":" Supply Voltage - Max:","Value":"6 V"},{"Name":"Number of Output Lines:","Value":"6"},{"Name":" Number of Input Lines:","Value":"6"}]

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