SN74HC377DWR Datasheet

Flip Flops


These devices are positive-edge-triggered octal D-type flip-flops with an enable input. The SN74HC377DWR devices are similar to the ’HC273 devices, but feature a latched clock-enable (CLKEN) input instead of a common clear.Information at the data (D) inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock (CLK) pulse, if CLKEN is low. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When CLK is at either the high or low level, the D input has no effect at the output. These devices are designed to prevent false clocking by transitions at CLKEN. SN74HC377DWR Features • Wide Operating Voltage Range of 2 V to 6 V• Outputs Can Drive Up To 10 LSTTL Loads• Low Power Consumption, 80-μA Max ICC• Typical tpd = 12 ns• ±4-mA Output Drive at 5 V• Low Input Current of 1 μA Max• Eight Flip-Flops With Single-Rail Outputs• Clock Enable Latched to Avoid False• Clocking• Applications Include: – Buffer/Storage Registers – Shift Registers – Pattern Generators


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