HomedatasheetSN74LVC125APWT

SN74LVC125APWT Datasheet

Buffers & Line Drivers
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Description

SN74LVC125APWT This quadruple bus buffer gate is designed for 1.65-V to 3.6-V VCC operation. The SN74LVC125A features independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is high. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in a mixed 3.3-V/5-V system environment. SN74LVC125APWT Features &bull; Operates From 1.65 V to 3.6 V&bull; Specified From &ndash;40&deg;C to 85&deg;C and &ndash;40&deg;C to 125&deg;C&bull; Inputs Accept Voltages to 5.5 V&bull; Max tpd of 4.8 ns at 3.3 V&bull; Typical VOLP (Output Ground Bounce)<0.8 V at VCC = 3.3 V, TA = 25&deg;C&bull; Typical VOHV (Output VOH Undershoot)>2 V at VCC = 3.3 V, TA = 25&deg;C&bull; Latch-Up Performance Exceeds 250 mA Per JESD 17&bull; ESD Protection Exceeds JESD 22 2000-V Human-Body Model (A114-A) 200-V Machine Model (A115-A) 1000-V Charged-Device Model (C101)
Features

Parameters

[{"Name":"Supply Voltage - Max","Value":"3.6 V"},{"Name":"Supply Voltage - Min","Value":"1.65 V"},{"Name":"Maximum Operating Temperature","Value":"+ 125 C"},{"Name":"High Level Output Current","Value":"- 24 mA"},{"Name":"Low Level Output Current","Value":"24 mA"},{"Name":"Maximum Power Dissipation","Value":"500 mW"},{"Name":"Minimum Operating Temperature","Value":"- 40 C"},{"Name":"","Value":""},{"Name":"","Value":""},{"Name":"","Value":""}]

Manufacturer information

SEIKO INSTRUMENTS
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