UPSD3254B-40U6 Datasheet

Flash Programmable System Devices with 8032 Microcontroller Core and 256Kbit SRAM


■ Dual bank Flash memories
   – Concurrent operation, read from memory while erasing and writing the other. In-Application Programming (IAP) for remote updates
   – Large 128KByte or 256KByte main Flash memory for application code, operating sys tems, or bit maps for graphic user interfaces
   – Large 32KByte secondary Flash memory di vided in small sectors. Eliminate external EE PROM with software EEPROM emulation
   – Secondary Flash memory is large enough for sophisticated communication protocol (USB) during IAP while continuing critical system tasks
■ Large SRAM with battery back-up option
   – 32KByte SRAM for RTOS, high-level languages, communication buffers, and stacks
■ Programmable Decode PLD for flexible address mapping of all memories
   – Place individual Flash and SRAM sectors on any address boundary
   – Built-in page register breaks restrictive 8032 limit of 64KByte address space
   – Special register swaps Flash memory segments between 8032 “program” space and “data” space for efficient In-Application Programming
■ High-speed clock standard 8032 core (12-cycle)
   – 40MHz operation at 5V, 24MHz at 3.3V
   – 2 UARTs with independent baud rate, three 16-bit Timer/Counters and two External Interrupts
■ USB Interface (some devices only)
   – Supports USB 1.1 Slow Mode (1.5Mbit/s)
   – Control endpoint 0 and interrupt endpoints 1 and 2
■ I2C interface for peripheral connections
   – Capable of master or slave operation
■ 5 Pulse Width Modulator (PWM) channels
   – Four 8-bit PWM units
   – One 8-bit PWM unit with programmable period
■ 4-channel, 8-bit Analog-to-Digital Converter (ADC) with analog supply voltage (VREF)
■ Standalone Display Data Channel (DDC)
   – For use in monitor, projector, and TV applications
   – Compliant with VESA standards DDC1 and DDC2B
   – Eliminate external DDC PROM
■ Six I/O ports with up to 50 I/O pins
   – Multifunction I/O: GPIO, DDC, I2C, PWM, PLD I/O, supervisor, and JTAG
   – Eliminates need for external latches and logic
■ 3000 gate PLD with 16 macrocells
   – Create glue logic, state machines, delays, etc.
   – Eliminate external PALs, PLDs, and 74HCxx
   – Simple PSDsoft Express software ...Free
■ Supervisor functions
   – Generates reset upon low voltage or watch dog time-out. Eliminate external supervisor device
   – RESET Input pin; Reset output via PLD
■ In-System Programming (ISP) via JTAG
   – Program entire chip in 10 - 25 seconds with no involvement of 8032
   – Allows efficient manufacturing, easy product testing, and Just-In-Time inventory
   – Eliminate sockets and pre-programmed parts
   – Program with FlashLINKTM cable and any PC
■ Content Security
   – Programmable Security Bit blocks access of device programmers and readers
■ Zero-Power Technology
   – Memories and PLD automatically reach standby current between input changes
■ Packages
   – 52-pin TQFP
   – 80-pin TQFP: allows access to 8032 address/data/control signals for connecting to external peripherals




Manufacturer information


STMicroelectronics is a global independent semiconductor company and is a leader in developing and delivering semiconductor solutions across the spectrum of microelectronics applications. An unrivaled combination of silicon and system expertise, manufacturing strength, Intellectual Property (IP) portfolio and strategic partners positions the Company at the forefront of System-on-Chip (SoC) technology and its products play a key role in enabling today's convergence trends

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