The is a CMOS 9Bit D/A converter for general applications. Its maximum conversion rate is 40MSPS and supply voltage is 1.8V single. An external 0.7V voltage reference(VBIAS) and a single resistor (RSET) control the full-scale output current.FEATURES
40 MSPS pipeline operation 1.8V CMOS monolithic construction � 0.3LSB differential linearity error (typical) �1.5LSB integral linearity error (typical) External voltage reference 9-Bit voltage parallel inputTYPICAL APPLICATIONS
High Definition Television (HDTV) Hard Disk Drive High Resolution Color Graphics CAE/CAD/CAM
Decoders D[8:0] 1st Latch Buffer CK1 CK2 CCOMP 2nd Latch Current Cell Array
Ver 2.4 (Apr. 2002) No responsibility is assumed by SEC for its use nor for any infringements of patents or other rights of third parties that may result from its use. The content of this datasheet is subject to change without any notice.
Pin Name D[8:0] CLK PD I/O Type DI I/O Pad picc_abb Digital Input Clock Input High=power saving standby mode (normally = gnd) VBIAS IREF CCOMP AI AO pia_abb poa_abb pia_abb poa_abb External Bias (0.7V) Full Scale Adjust Control Using Compensation Capacitor Analog Output (output Range : 0.66Vpp) IOB AO poa_abb Analog Output (output Range AVSS18D AVBB18A I/O Type Abbr. AI: Analog Input DI: Digital Input AO: Analog Output DO: Digital Output AB: Analog Bi-direction DB: Digital Bi-direction AP: Analog Power AG: Analog Ground DP: Digital Power DG: Digital Ground vdd1t_abb vss1t_abb vbb_abb Analog Power Analog Ground Digital Power Digital Ground Analog Ground ( bulk bias ) Pin Description