dac1331x Datasheet

Mixed Signal Cores->0.18um


Features, Applications

The DAC1331X core is a CMOS 10-bit dual D/A Converter Wireless Lan application. The typical conversion rate It is fabricated with 0.18um process and operated at 1.8Vsingle power.


40MSPS operation +1.8V single power supply ~ 0.5V output swing Power down mode (active HIGH) Two's complementary parallel input

Analog Switch 36 2'nd Latch 36 Decoder & 1'st Latch Level shifter

1.3 (Apr. 2002) No responsibility is assumed by SEC for its use nor for any infringements of patents or other rights of third parties that may from its use. The content of this datasheet is subject to without any notice.

Pin Name TXIP,TXIN TXQP,TXQN DI[9:0], DQ[9:0] PDI,PDQ CLKI, CLKQ VREFOUT IRSET CCOMP SIN AVBB18A AVBB18D I/O Type Abbr. AI: Analog Input DI: Digital Input AO: Analog Output DO: Digital Output AB: Analog Bi-direction DB: Digital Bi-direction AP: Analog Power AG: Analog Ground DP: Digital Power DG: Digital Ground DP AG picc_abb poa_abb vss1t vbb1t Digital Input power down and standby mode Clock Input Bias (0.4V) Probing pin Using Compensation Capacitor(0.1uF) Using Compensation Capacitor(0.1uF) Analog Power Analog Ground Digital Power Digital Ground Analog Ground (bulk bias ) Analog Ground ( bulk bias ) I/O Type AO I/O Pad poa_abb Analog Output Voltage Pin Description



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