The is a CMOS 12-bit D/A converter for general applications. The maximum conversion rate is 80MSPS and supply voltage is 2.5V.FEATURES
Resolution: 12-bit Differential linearity error: � 1.0LSB Integral linearity error: � 4.0LSB Maximum conversion rate: 80MSPS BGR (Internal / External) Power down mode Analog output range: ~ 1.024V Power supply: 2.5V singleTYPICAL APPLICATIONS
Decoder D[11:0] 1st latch Buffer 2nd Latch Current Cell Matrix
Ver1.1 (April 2003) This data sheet is a preliminary version. No responsibility is assumed by SEC for its use nor for any infringements of patents or other rights of third parties that may result from its use. The content of this data sheet is subject to change without any notice.
Name D[11:0] CLK PD VREF IREF IOUT IOUTB COMP SIN AVSS25D AVBB25D I/O Type Abbr. AI: Analog Input DI: Digital Input AO: Analog Output DO: Digital Output AP: Analog Power AG: Analog Ground DP: Digital Power DG: Digital Ground AB: Analog Bi-Direction DB: Digital Bi-Direction I/O Type DP DG I/O Pad pmicc_abb pmia_abb pmoa_abb vdd25tm_abb vsstm_abb vbbm_abb vdd25tm_abb vsstm_abb vbbm_abb Pin Description Digital input data (12-bit) D: MSB, D: LSB Clock for DAC Power down control Voltage reference (BGR output) External resistor connection Analog output Complementary analog output External capacitor connection Cascode current source gate node Analog power (+2.5V) Analog ground (0.0V) Analog sub bias (0.0V) Digital power (+2.5V) Digital ground (0.0V) Digital sub bias (0.0V)